Vertical transistors—in which the channel length is determined by the thickness of the semiconductor—are of interest in the development of next-generation electronic devices. However, short-channel vertical devices are difficult to fabricate, because the high-energy metallization process typically results in damage to the contact region. Here we show that molybdenum disulfide (MoS 2 ) vertical transistors with channel lengths down to one atomic layer can be created using a low-energy van der Waals metal integration technique. The approach uses prefabricated metal electrodes that are mechanically laminated and transferred on top of MoS 2 /graphene vertical heterostructures, leading to vertical field-effect transistors with on–off ratios of 26 and 10 3 for channel lengths of 0.65 nm and 3.60 nm, respectively. Using scanning tunnelling microscopy and low-temperature electrical measurements, we show that the improved electrical performance is the result of a high-quality metal–semiconductor interface, with minimized direct tunnelling current and Fermi-level pinning effect. The approach can also be extended to other layered materials (tungsten diselenide and tungsten disulfide), resulting in sub-3-nm p-type and n-type vertical transistors.