Quantum mechanics

Engineering

Wafer-level packaging

Materials science

Fan-out

Power (physics)

Mechanical engineering

Physics

Nanotechnology

Wafer

Thermal

Temperature cycling

Reliability (semiconductor)

Die (integrated circuit)

Meteorology

Chip

Chip-scale package

Optoelectronics

Electrical engineering

Printed circuit board

Journal of Electronic Packaging

The recent advances and trends in fan-out wafer/panel-level packaging (FOW/PLP) are presented in this study. Emphasis is placed on: (A) the package formations such as (a) chip first and die face-up, (b) chip first and die face-down, and (c) chip last or redistribution layer (RDL)-first; (B) the RDL fabrications such as (a) organic RDLs, (b) inorganic RDLs, (c) hybrid RDLs, and (d) laser direct imaging (LDI)/printed circuit board (PCB) Cu platting and etching RDLs; (C) warpage; (D) thermal performance; (E) the temporary wafer versus panel carriers; and (F) the reliability of packages on PCBs subjected to thermal cycling condition. Some opportunities for FOW/PLP will be presented.

Recent Advances and Trends in Fan-Out Wafer/Panel-Level Packaging