Computer hardware

Algorithm

Linguistics

Philosophy

Data-flow analysis

Embedded system

Computer security

Trojan

Register-transfer level

Theoretical computer science

Data flow diagram

Scalability

Computer science

Integrated circuit design

Design flow

Computer architecture

Database

Graph

Instruction set

Register file

Hardware security module

Logic gate

Logic synthesis

Artificial intelligence

Hardware Trojan

Cryptography

Register (sociolinguistics)

Artificial neural network

The time to market pressure and resource constraints has pushed System-on-Chip (SoC) designers toward outsourcing the design and using third-party Intellectual Property (IP). It has created an opportunity for rogue entities in the Integrated Circuit (IC) supply chain to insert malicious circuits in the hardware design, known as Hardware Trojans (HT). HT detection is a major hardware security challenge, and its early discovery is crucial because postponing the removal of HT to late in design or after the fabrication process would be very expensive. Current works suffer from several shortcomings such as reliance on a golden HT-free reference, unable to identify all types of HTs or unknown ones, burdening the designer with the manual review of code, or scalability issues. To overcome these limitations, we propose GNN4TJ, a novel golden reference-free HT detection method in the register transfer level (RTL) based on Graph Neural Network (GNN). GNN4TJ represents the hardware design as its intrinsic data structure, a graph, and generates the data flow graphs for RTL codes. We utilize GNN to extract the features from DFG, learn the circuit's behavior, and identify the presence of HT, in a fully automated pipeline. We evaluate our model on a dataset that we create by expanding the Trusthub [1] HT benchmarks. The results demonstrate that GNN4TJ detects unknown HT with 97% recall (true positive rate) very fast in 21.1ms.

GNN4TJ: Graph Neural Networks for Hardware Trojan Detection at Register Transfer Level