Voltage

Engineering

Computer security

Set (abstract data type)

Computer science

Visual arts

Electronic circuit

Ranking (information retrieval)

Analogue electronics

Electronic engineering

Computer engineering

Artificial intelligence

Comparator

Programming language

Artificial neural network

Machine learning

Sizing

Electrical engineering

Key (lock)

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Machine learning-assisted global optimization methods for speeding up analog integrated circuit sizing is attracting much attention. However, often a few typical analog integrated circuit design specifications are considered in most relevant research. When considering the complete set of specifications, two main challenges are yet to be addressed: 1) the prediction error for some performances may be large and the prediction error is accumulated by many performances. This may mislead the optimization and fail the sizing, especially when the specifications are stringent and 2) the machine learning cost could be high considering the number of specifications, considerably canceling out the time saved. A new method, called efficient surrogate model-assisted sizing method for high-performance analog building blocks (ESSAB), is proposed in this article to address the above challenges. The key innovations include a new candidate design ranking method and a new artificial neural network model construction method for analog circuit performance. Experiments using two amplifiers and a comparator with a complete set of stringent design specifications show the advantages of ESSAB.

An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization