Analog front-end

Algorithm

Voltage

Engineering

Bandwidth (computing)

Infinite impulse response

Waveform

Operating system

Telecommunications

Amplifier

Computer science

Adaptive filter

Front and back ends

Mathematics

Digital filter

Impulse response

Electronic engineering

Mathematical analysis

Finite impulse response

Chip

CMOS

Electrical engineering

IEEE Journal of Solid-State Circuits

We present a 180-nm CMOS bidirectional neural interface system-on-chip that enables simultaneous recording and stimulation with on-chip stimulus artifact cancelers. The front-end cancellation scheme incorporates a least-mean-square engine that adapts the coefficients of a 2-tap infinite-impulse-response filter to replicate the stimulation artifact waveform and subtract it at the front-end. Measurements demonstrate the efficacy of the canceler in mitigating artifacts up to 700 mVpp and reducing the front-end amplifier saturation recovery time in response to a 2.5 Vpp artifact. Each recording channel houses a pair of adaptive infinite-impulse-response filters, which enable cancellation of the artifacts generated by the simultaneous operation of the 2 on-chip stimulators. The analog front-end consumes 2.5 μW of power per channel, has a maximum gain of 50 dB and a bandwidth of 9.0 kHz with 6.2 μVrms integrated input-referred noise.

A Bidirectional Neural Interface SoC With Adaptive IIR Stimulation Artifact Cancelers