Energy consumption

Computer hardware

Algorithm

Selective attention

Voltage

Engineering

Neuroscience

Materials science

Cognition

Computation

Telecommunications

Parallel computing

Computer science

Computer network

Transistor

Nanotechnology

Psychology

MNIST database

Crossbar switch

Terminal (telecommunication)

Neuromorphic engineering

Electronic engineering

Artificial intelligence

Crosstalk

Resistive random-access memory

Artificial neural network

Electrical engineering

ACS Nano

Two-terminal resistive switching devices are commonly plagued with longstanding scientific issues including interdevice variability and sneak current that lead to computational errors and high-power consumption. This necessitates the integration of a separate selector in a one-transistor-one-RRAM (1T-1R) configuration to mitigate crosstalk issue, which compromises circuit footprint. Here, we demonstrate a multi-terminal memtransistor crossbar array with increased parallelism in programming via independent gate control, which allows in situ computation at a dense cell size of 3–4.5 F2 and a minimal sneak current of 0.1 nA. Moreover, a low switching energy of 20 fJ/bit is achieved at a voltage of merely 0.42 V. The architecture is capable of performing multiply-and-accumulate operation, a core computing task for pattern classification. A high MNIST recognition accuracy of 96.87% is simulated owing to the linear synaptic plasticity. Such computing paradigm is deemed revolutionary toward enabling data-centric applications in artificial intelligence and Internet-of-things.

Self-Selective Multi-Terminal Memtransistor Crossbar Array for In-Memory Computing