Gene

Computer hardware

Engineering

Embedded system

Scheduling (production processes)

ENCODE

Operating system

Economics

Biochemistry

Computer science

Hardware acceleration

Computer architecture

Data type

Design space exploration

Processor scheduling

Operations management

Schedule

Chemistry

Programming language

Wireless

Throughput

Field-programmable gate array

Designing efficient, application-specialized hardware accelerators requires assessing trade-offs between a hardware module’s performance and resource requirements. To facilitate hardware design space exploration, we describe Aetherling, a system for automatically compiling data-parallel programs into statically scheduled, streaming hardware circuits. Aetherling contributes a space- and time-aware intermediate language featuring data-parallel operators that represent parallel or sequential hardware modules, and sequence data types that encode a module’s throughput by specifying when sequence elements are produced or consumed. As a result, well-typed operator composition in the space-time language corresponds to connecting hardware modules via statically scheduled, streaming interfaces.

Type-directed scheduling of streaming accelerators