flash memory

garbage collection

IEEE Transactions on Consumer Electronics

NAND flash memory has been widely used as data storage devices in consumer electronics, such as tablet computers and smart phones. Logical-to-physical address translation is important for improving the performance of NAND flash-based SSDs. Even though keeping the mapping table in a DRAM can boost the address translation, it is already infeasible to do this as the capacity of SSDs keeps increasing and only a limited part of DRAM will be used as the mapping cache. Orthogonal to the demand-based page-level FTLs, we develop a novel  group-level mapping  which divides the whole SSD into multiple equal-size groups. To map a logical-page-number to a physical-page-number, it will be translated into a group number and an offset. The group number can be obtained via calculation, and the offset will be retrieved from a recorded mapping entry which can correspond to any position within a group. Group-level mapping reduces the size of mapping table while obtaining the similar flexibility as the page-level mapping. We also design an effective  group-level FTL  (GFTL) with a block pool management approach. Our simulations show that GFTL improves the hit ratio of mapping cache and thus reduces the average response time.

GFTL: Group-Level Mapping in Flash Translation Layer to Provide Efficient Address Translation for NAND Flash-Based SSDs