Electrical engineering

Physics

Logic gate

Cellular automaton

CMOS

Algorithm

Electronic circuit

Quantum dot cellular automaton

Macroeconomics

Multiplier (economics)

Engineering

Adder

Dissipation

Parallel computing

Economics

Electronic engineering

Computer science

XOR gate

Thermodynamics

IEEE Transactions on Circuits & Systems II Express Briefs

This brief presents an efficient single-layer serial-parallel multiplier (SPM) in Quantum-dot Cellular Automata (QCA). We have designed a bit-serial adder (BSA) using a fully utilized majority gate (MV), and a modified E-shaped exclusive-OR (E-XOR) gate. The cell-interactive properties of the QCA cell have been utilized to realize the proposed E-XOR gate. This new gate leads the proposed SPM to achieve a reduction in cell count and area by 30% and 19%, 29% and 24%, 30% and 22%, 32% and 39%, and 36% and 46% for 4-, 8-, 16-, 32-, and 64-bit multipliers, respectively. All proposed circuits have been simulated and verified by using QCADesigner with a coherence vector simulation engine. In addition, the average switching and leakage energy dissipation are estimated using QCAPro tool.

Design of QCA-Serial Parallel Multiplier (QSPM) With Energy Dissipation Analysis