Original paper

Study on 4H-SiC GGNMOS Based ESD Protection Circuit With Low Trigger Voltage Using Gate-Body Floating Technique for 70-V Applications

Published: Dec 11, 2018
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Paper Details
Title
Study on 4H-SiC GGNMOS Based ESD Protection Circuit With Low Trigger Voltage Using Gate-Body Floating Technique for 70-V Applications
Published Date
Dec 11, 2018
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