Study on 4H-SiC GGNMOS Based ESD Protection Circuit With Low Trigger Voltage Using Gate-Body Floating Technique for 70-V Applications

Volume: 40, Issue: 2, Pages: 283 - 286
Published: Dec 11, 2018
Paper Details
Title
Study on 4H-SiC GGNMOS Based ESD Protection Circuit With Low Trigger Voltage Using Gate-Body Floating Technique for 70-V Applications
Published Date
Dec 11, 2018
Volume
40
Issue
2
Pages
283 - 286
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