Computer hardware

Algorithm

CHAOS (operating system)

Embedded system

Operating system

Stream cipher

Parallel computing

Computer science

Cryptography

Field-programmable gate array

International Journal of Engineering and Technology

A novel stream cipher based on chaotic synchronization is presented in this paper, a simple and effective technique is used for this purpose; it consists of feeding back the ciphertext to the cryptosystem and incorporates it on the driver signal for synchronization.Simulation results showed that the proposed stream cipher (PSC) has good confusion/diffusion properties and provide a strong key.The performed statistical and security analysis on the PSC confirms its feasibility for security purposes.The hardware-in-the-loop co-simulation over Xilinx XC6SLX45 FPGA of the PSC is provided, where a clock frequency of 50.24MHz is achieved corresponding to high throughput of 2.51 Gbps.The obtained results make the PSC suitable for nowadays needs of secure and robust crypto-systems.

FPGA Hardware Co-simulation of New Chaos-Based Stream Cipher Based on Lozi Map