Quantum mechanics

Voltage

Engineering

Parasitic element

Inductance

Materials science

Telecommunications

Power (physics)

Transistor

Physics

Electronic engineering

Interconnection

Reliability (semiconductor)

Insulated-gate bipolar transistor

Optoelectronics

Electrical engineering

MOSFET

IEEE Transactions on Power Electronics

In this paper, a hybrid switch (HyS) consisting of a large current rated Si insulated-gate bipolar transistor (IGBT) device connected in parallel with a small current rated SiC MOSFET device (low SiC/Si current ratio below unity) is proposed for high-current high-power converters. A systematic analysis involving a parametric sweep to understand the influence and to derive a boundary line of the parasitic interconnection inductance unbalance between Si and SiC within the HyS is presented. The boundary line prescribes the selection of an appropriate gate sequence control. A comprehensive cost analysis was performed using commercial 1.2 kV devices to demonstrate the cost viability of a 1:4 or 1:6 SiC/Si current ratio HyS compared to a SiC MOSFET. An algorithm using a dynamic junction temperature prediction is presented to select an optimum SiC/Si current ratio, which ensures a reliable HyS operation. Using a design example, the possibility of reliability using a 1:6 SiC/Si HyS is studied. A 650 V Si-IGBT- and SiC-MOSFET-based HyS (1:5 SiC/Si current ratio) was successfully demonstrated in a dc-dc boost converter. Also, electromagnetic interference analysis is presented for the HyS-based converter operation.

Practical Design Considerations for a Si IGBT + SiC MOSFET Hybrid Switch: Parasitic Interconnect Influences, Cost, and Current Ratio Optimization