Electrical engineering

Physics

Bandwidth (computing)

Signal edge

Modulation (music)

Analog signal

Engineering

Jitter

Voltage

Acoustics

Feedback loop

Electronic engineering

High dynamic range

Computer science

Digital signal processing

Computer hardware

Computer security

Telecommunications

Dynamic range

Pulse-width modulation

IEEE Journal of Solid-State Circuits

High efficiency Class-D speaker drivers have become ubiquitous in battery driven mobile audio applications. Analog switching errors and timing jitter are known limitations to the dynamic range in these types of switching audio drivers. To overcome these limitations the Class-D architecture chosen in this paper provides a low 667 kHz pulse rate. This architecture is based on a 4th-order digital modulator with pulse-width modulation (PWM) feedback. The modulator loop processes the PWM signals at a high 24 MHz clock rate, and provides pulse edge timing resolution within a single clock period of the high-rate clock. Timing distortion errors due to uniform sampling of the low-rate PWM signals are reduced with the high forward loop gain of the digital modulator feedback loop. The driver receives a 22-bit digital audio input and combines the functionality of a high-fidelity digital-to-analog converter (DAC) with a speaker driver. It achieves 120 dB dynamic range over a 20 kHz bandwidth, provides 88% power efficiency while driving an 8 Ω speaker load, and consumes a total quiescent current of 2.4 mA.

A 120 dB Dynamic Range 400 mW Class-D Speaker Driver With Fourth-Order PWM Modulator