Memory controller

Epistemology

Operating system

Computer architecture

Architecture

Philosophy

Embedded system

Visual arts

Parallel computing

Memory management

Memory bandwidth

CAS latency

Bandwidth (computing)

Memory architecture

Overhead (engineering)

Simple (philosophy)

Computer network

Computer science

Interleaved memory

Dram

Registered memory

Computer hardware

Semiconductor memory

In this paper, we present GradPIM, a processingin-memory architecture which accelerates parameter updates of deep neural networks training. As one of processing-in-memory techniques that could be realized in the near future, we propose an incremental, simple architectural design that does not invade the existing memory protocol. Extending DDR4 SDRAM to utilize bank-group parallelism makes our operation designs in processing-in-memory (PIM) module efficient in terms of hardware cost and performance. Our experimental results show that the proposed architecture can improve the performance of DNN training and greatly reduce memory bandwidth requirement while posing only a minimal amount of overhead to the protocol and DRAM area.

GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent