Machine learning

Materials science

Electronic engineering

Optoelectronics

Engineering

Power semiconductor device

Power (physics)

Radio frequency

Physics

Transistor

CMOS

Quantum mechanics

Recurrent neural network

Voltage

Threshold voltage

Power consumption

Computer science

Precision rectifier

Low-power electronics

Electrical engineering

PMOS logic

Power factor

Stochastic neural network

Rectifier (neural networks)

Artificial neural network

IEEE Transactions on Microwave Theory and Techniques

This article proposes a dual-mode (DM) nested radio frequency (RF) rectifier for ambient wireless powering. The proposed architecture utilizes a DM nested feedback circuit to enhance the conductivity of the rectifier at low power while reducing the reverse leakage current at high power by generating supply voltages at the gates of the pMOS rectifying transistors. The proposed rectifier is fabricated in a 65-nm CMOS technology and occupies an area of 6480 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The measurement results show a peak power conversion efficiency of 86%, 10.1-dB dynamic range, and -19.2-dBm 1-V sensitivity when operating with a 100-kΩ load at the industrial, scientific, and medical band 433 MHz. Moreover, the enhanced low-power performance is achieved by reducing the effective threshold voltage of the rectifier by about 37%, compared with a low-threshold transistor in the 65-nm technology. This reduction in the threshold voltage allows the rectifier to operate with efficiency exceeding 10% for input power ≥ -40 dBm.

A Dual-Mode Nested Rectifier for Ambient Wireless Powering in CMOS Technology